1 // --------------------------------------------------------------
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2 // (C)Copyright 2007,
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3 // International Business Machines Corporation,
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4 // All Rights Reserved.
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5 // --------------------------------------------------------------
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7 #ifndef _spu_mfcio_ext_h_
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8 #define _spu_mfcio_ext_h_
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14 #include <spu_intrinsics.h>
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15 #include <spu_mfcio.h>
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17 static uint32_t msg[4]__attribute__ ((aligned (16)));
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19 // ==========================================================================
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21 // ==========================================================================
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22 #define SPU_IN_MBOX_OFFSET 0x0C // offset of mailbox status register from control area base
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23 #define SPU_IN_MBOX_OFFSET_SLOT 0x3 // 16B alignment of mailbox status register = (SPU_MBOX_STAT_OFFSET&0xF)>>2
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24 #define SPU_MBOX_STAT_OFFSET 0x14 // offset of mailbox status register from control area base
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25 #define SPU_MBOX_STAT_OFFSET_SLOT 0x1 // 16B alignment of mailbox status register = (SPU_MBOX_STAT_OFFSET&0xF)>>2
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27 #define SPU_SIG_NOTIFY_OFFSET 0x0C // offset of signal notify 1 or 2 registera from signal notify 1 or 2 areas base
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28 #define SPU_SIG_NOTIFY_OFFSET_SLOT 0x3 // 16B alignment of signal notify 1 or 2 register = (SPU_SIG_NOTIFY_OFFSET&0xF)>>2
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30 // ==========================================================================
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31 // Functions definitions
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32 // ==========================================================================
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34 inline int status_mbox(uint64_t ea_mfc, uint32_t tag_id);
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35 inline int status_in_mbox(uint64_t ea_mfc, uint32_t tag_id);
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36 inline int status_out_mbox(uint64_t ea_mfc, uint32_t tag_id);
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37 inline int status_outintr_mbox(uint64_t ea_mfc, uint32_t tag_id);
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39 int write_in_mbox(uint32_t data, uint64_t ea_mfc, uint32_t tag_id);
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40 int write_signal1(uint32_t data, uint64_t ea_mfc, uint32_t tag_id);
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41 int write_signal2(uint32_t data, uint64_t ea_mfc, uint32_t tag_id);
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43 // returns the value of mailbox status register of remote SPE
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44 inline int status_mbox(uint64_t ea_mfc, uint32_t tag_id)
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46 uint32_t status[4], idx;
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47 uint64_t ea_stat_mbox = ea_mfc + SPU_MBOX_STAT_OFFSET;
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49 //printf("<SPE: ea_mfc=0x%llx, ea_stat_mbox=0x%llx\n", ea_mfc, ea_stat_mbox );
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51 idx = SPU_MBOX_STAT_OFFSET_SLOT;
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53 mfc_get((void *)&status[idx], ea_stat_mbox, sizeof(uint32_t), tag_id, 0, 0);
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54 mfc_write_tag_mask(1<<tag_id);
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55 mfc_read_tag_status_any();
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57 //printf("<SPE: Status=0x%x: OutIntrCnt=0x%x, InCnt=0x%x, OutCnt=0x%x\n", status[idx],
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58 // (status[idx]&0xffff0000)>>16, (status[idx]&0x0000ff00)>>8, (status[idx]&0x000000ff) );
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59 //printf("<SPE: status_mbox=%d\n", status[idx] );
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64 // returns the status (counter) of inbound_mailbox of remote SPE
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65 inline int status_in_mbox(uint64_t ea_mfc, uint32_t tag_id)
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67 int status = status_mbox( ea_mfc, tag_id);
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69 status = (status&0x0000ff00)>>8;
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71 //printf("<SPE: status_in_mbox=%d\n", status );
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76 // returns the status (counter) of outbound_mailbox of remote SPE
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77 inline int status_out_mbox(uint64_t ea_mfc, uint32_t tag_id)
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79 int status = status_mbox( ea_mfc, tag_id);
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81 status = (status&0x000000ff);
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83 //printf("<SPE: status_out_mbox=%d\n", status[idx] );
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88 // returns the status (counter) of inbound_interrupt_mailbox of remote SPE
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89 inline int status_outintr_mbox(uint64_t ea_mfc, uint32_t tag_id)
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91 int status = status_mbox( ea_mfc, tag_id);
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93 status = (status&0xffff0000)>>16;
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95 //printf("<SPE: status_outintr_mbox=%d\n", status[idx] );
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100 // writing to a remote SPE�s inbound mailbox
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101 inline int write_in_mbox(uint32_t data, uint64_t ea_mfc, uint32_t tag_id){
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104 uint64_t ea_in_mbox = ea_mfc + SPU_IN_MBOX_OFFSET;
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105 uint32_t mbx[4], idx;
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107 idx = SPU_IN_MBOX_OFFSET_SLOT;
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110 while( (status= status_in_mbox(ea_mfc, tag_id))<1);
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112 mfc_put((void *)&mbx[idx], ea_in_mbox, sizeof(uint32_t), tag_id, 0, 0);
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113 mfc_write_tag_mask(1<<tag_id);
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114 mfc_read_tag_status_any();
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116 //printf("<SPE: write_in_mbox: complete\n" );
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118 return 1; // number of mailbox being written
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121 // signal a remote SPE�s signal1 register
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122 inline int write_signal1(uint32_t data, uint64_t ea_sig1, uint32_t tag_id)
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124 uint64_t ea_sig1_notify = ea_sig1 + SPU_SIG_NOTIFY_OFFSET;
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127 //printf("<SPE: write_signal1: starts\n" );
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129 //printf("<SPE: write_signal1: ea_mfc=0x%llx, ea_in_mbox=0x%llx\n", ea_sig1, ea_sig1_notify );
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131 idx = SPU_SIG_NOTIFY_OFFSET_SLOT;
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134 mfc_sndsig( &msg[idx], ea_sig1_notify, tag_id, 0,0) ;
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135 mfc_write_tag_mask(1<<tag_id);
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136 mfc_read_tag_status_any();
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138 //printf("<SPE: write_in_mbox: complete\n" );
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140 return 1; // number of mailbox being written
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143 // signal a remote SPE�s signal1 register
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144 inline int write_signal2(uint32_t data, uint64_t ea_sig2, uint32_t tag_id)
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146 uint64_t ea_sig2_notify = ea_sig2 + SPU_SIG_NOTIFY_OFFSET;
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149 //printf("<SPE: write_signal2: starts\n" );
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151 //printf("<SPE: write_signal2: ea_mfc=0x%llx, ea_in_mbox=0x%llx\n", ea_sig2, ea_sig2_notify );
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153 idx = SPU_SIG_NOTIFY_OFFSET_SLOT;
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156 mfc_sndsig( &msg[idx], ea_sig2_notify, tag_id, 0,0) ;
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157 mfc_write_tag_mask(1<<tag_id);
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158 mfc_read_tag_status_any();
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160 //printf("<SPE: write_in_mbox: complete\n" );
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162 return 1; // number of mailbox being written
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