--- /dev/null
+// -------------------------------------------------------------- \r
+// (C)Copyright 2007, \r
+// International Business Machines Corporation, \r
+// All Rights Reserved.\r
+// -------------------------------------------------------------- \r
+ \r
+#ifndef _spu_mfcio_ext_h_\r
+#define _spu_mfcio_ext_h_\r
+\r
+#include <stdint.h>\r
+#include <stdio.h>\r
+#include <ctype.h>\r
+\r
+#include <spu_intrinsics.h>\r
+#include <spu_mfcio.h>\r
+\r
+static uint32_t msg[4]__attribute__ ((aligned (16)));\r
+\r
+// ==========================================================================\r
+// Definitions\r
+// ==========================================================================\r
+#define SPU_IN_MBOX_OFFSET 0x0C // offset of mailbox status register from control area base\r
+#define SPU_IN_MBOX_OFFSET_SLOT 0x3 // 16B alignment of mailbox status register = (SPU_MBOX_STAT_OFFSET&0xF)>>2\r
+#define SPU_MBOX_STAT_OFFSET 0x14 // offset of mailbox status register from control area base\r
+#define SPU_MBOX_STAT_OFFSET_SLOT 0x1 // 16B alignment of mailbox status register = (SPU_MBOX_STAT_OFFSET&0xF)>>2\r
+\r
+#define SPU_SIG_NOTIFY_OFFSET 0x0C // offset of signal notify 1 or 2 registera from signal notify 1 or 2 areas base\r
+#define SPU_SIG_NOTIFY_OFFSET_SLOT 0x3 // 16B alignment of signal notify 1 or 2 register = (SPU_SIG_NOTIFY_OFFSET&0xF)>>2\r
+\r
+// ==========================================================================\r
+// Functions definitions\r
+// ==========================================================================\r
+\r
+inline int status_mbox(uint64_t ea_mfc, uint32_t tag_id);\r
+inline int status_in_mbox(uint64_t ea_mfc, uint32_t tag_id);\r
+inline int status_out_mbox(uint64_t ea_mfc, uint32_t tag_id);\r
+inline int status_outintr_mbox(uint64_t ea_mfc, uint32_t tag_id);\r
+\r
+int write_in_mbox(uint32_t data, uint64_t ea_mfc, uint32_t tag_id);\r
+int write_signal1(uint32_t data, uint64_t ea_mfc, uint32_t tag_id);\r
+int write_signal2(uint32_t data, uint64_t ea_mfc, uint32_t tag_id);\r
+\r
+// returns the value of mailbox status register of remote SPE\r
+inline int status_mbox(uint64_t ea_mfc, uint32_t tag_id)\r
+{\r
+ uint32_t status[4], idx; \r
+ uint64_t ea_stat_mbox = ea_mfc + SPU_MBOX_STAT_OFFSET;\r
+\r
+ //printf("<SPE: ea_mfc=0x%llx, ea_stat_mbox=0x%llx\n", ea_mfc, ea_stat_mbox );\r
+ \r
+ idx = SPU_MBOX_STAT_OFFSET_SLOT;\r
+ \r
+ mfc_get((void *)&status[idx], ea_stat_mbox, sizeof(uint32_t), tag_id, 0, 0);\r
+ mfc_write_tag_mask(1<<tag_id);\r
+ mfc_read_tag_status_any();\r
+\r
+ //printf("<SPE: Status=0x%x: OutIntrCnt=0x%x, InCnt=0x%x, OutCnt=0x%x\n", status[idx], \r
+ // (status[idx]&0xffff0000)>>16, (status[idx]&0x0000ff00)>>8, (status[idx]&0x000000ff) );\r
+ //printf("<SPE: status_mbox=%d\n", status[idx] );\r
+ \r
+ return status[idx];\r
+}\r
+\r
+// returns the status (counter) of inbound_mailbox of remote SPE\r
+inline int status_in_mbox(uint64_t ea_mfc, uint32_t tag_id)\r
+{\r
+ int status = status_mbox( ea_mfc, tag_id);\r
+ \r
+ status = (status&0x0000ff00)>>8;\r
+ \r
+ //printf("<SPE: status_in_mbox=%d\n", status );\r
+ \r
+ return status;\r
+}\r
+\r
+// returns the status (counter) of outbound_mailbox of remote SPE\r
+inline int status_out_mbox(uint64_t ea_mfc, uint32_t tag_id)\r
+{\r
+ int status = status_mbox( ea_mfc, tag_id);\r
+\r
+ status = (status&0x000000ff);\r
+ \r
+ //printf("<SPE: status_out_mbox=%d\n", status[idx] );\r
+ \r
+ return status;\r
+}\r
+\r
+// returns the status (counter) of inbound_interrupt_mailbox of remote SPE\r
+inline int status_outintr_mbox(uint64_t ea_mfc, uint32_t tag_id)\r
+{\r
+ int status = status_mbox( ea_mfc, tag_id);\r
+\r
+ status = (status&0xffff0000)>>16;\r
+ \r
+ //printf("<SPE: status_outintr_mbox=%d\n", status[idx] );\r
+ \r
+ return status;\r
+}\r
+\r
+// writing to a remote SPE�s inbound mailbox\r
+inline int write_in_mbox(uint32_t data, uint64_t ea_mfc, uint32_t tag_id){\r
+\r
+ int status;\r
+ uint64_t ea_in_mbox = ea_mfc + SPU_IN_MBOX_OFFSET; \r
+ uint32_t mbx[4], idx;\r
+\r
+ idx = SPU_IN_MBOX_OFFSET_SLOT;\r
+ mbx[idx] = data;\r
+ \r
+ while( (status= status_in_mbox(ea_mfc, tag_id))<1);\r
+ \r
+ mfc_put((void *)&mbx[idx], ea_in_mbox, sizeof(uint32_t), tag_id, 0, 0);\r
+ mfc_write_tag_mask(1<<tag_id);\r
+ mfc_read_tag_status_any();\r
+\r
+ //printf("<SPE: write_in_mbox: complete\n" ); \r
+ \r
+ return 1; // number of mailbox being written\r
+}\r
+\r
+// signal a remote SPE�s signal1 register\r
+inline int write_signal1(uint32_t data, uint64_t ea_sig1, uint32_t tag_id)\r
+{\r
+ uint64_t ea_sig1_notify = ea_sig1 + SPU_SIG_NOTIFY_OFFSET; \r
+ uint32_t idx;\r
+\r
+ //printf("<SPE: write_signal1: starts\n" );\r
+ \r
+ //printf("<SPE: write_signal1: ea_mfc=0x%llx, ea_in_mbox=0x%llx\n", ea_sig1, ea_sig1_notify );\r
+ \r
+ idx = SPU_SIG_NOTIFY_OFFSET_SLOT;\r
+ msg[idx] = data;\r
+ \r
+ mfc_sndsig( &msg[idx], ea_sig1_notify, tag_id, 0,0) ;\r
+ mfc_write_tag_mask(1<<tag_id);\r
+ mfc_read_tag_status_any();\r
+\r
+ //printf("<SPE: write_in_mbox: complete\n" ); \r
+ \r
+ return 1; // number of mailbox being written\r
+}\r
+\r
+// signal a remote SPE�s signal1 register\r
+inline int write_signal2(uint32_t data, uint64_t ea_sig2, uint32_t tag_id)\r
+{\r
+ uint64_t ea_sig2_notify = ea_sig2 + SPU_SIG_NOTIFY_OFFSET; \r
+ uint32_t idx;\r
+\r
+ //printf("<SPE: write_signal2: starts\n" );\r
+ \r
+ //printf("<SPE: write_signal2: ea_mfc=0x%llx, ea_in_mbox=0x%llx\n", ea_sig2, ea_sig2_notify );\r
+ \r
+ idx = SPU_SIG_NOTIFY_OFFSET_SLOT;\r
+ msg[idx] = data;\r
+ \r
+ mfc_sndsig( &msg[idx], ea_sig2_notify, tag_id, 0,0) ;\r
+ mfc_write_tag_mask(1<<tag_id);\r
+ mfc_read_tag_status_any();\r
+\r
+ //printf("<SPE: write_in_mbox: complete\n" ); \r
+ \r
+ return 1; // number of mailbox being written\r
+}\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+#endif\r
+\r
projects / jump.git / blobdiff