dol: initial dol commit

[jump.git] / dol / src / dol / visitor / hdsd / scd / fsm / scd_stm_base.h

diff --git a/dol/src/dol/visitor/hdsd/scd/fsm/scd_stm_base.h b/dol/src/dol/visitor/hdsd/scd/fsm/scd_stm_base.h
new file mode 100644 (file)
index 0000000..6b8463f
--- /dev/null
+++ b/dol/src/dol/visitor/hdsd/scd/fsm/scd_stm_base.h
@@ -0,0 +1,64 @@
+#ifndef SCD_STM_BASE_H
+#define SCD_STM_BASE_H
+
+#include <list>
+
+#include "scd_simulator.h"
+#include "scd_cont_slave_wrapper.h"
+#include "fsm/scd_cont_state.h"
+
+
+/* forward declaration */
+class scd_cont_man_master;
+
+
+/**
+ * Base class for all control master states.
+ */
+class scd_stm_base : public scd_cont_state
+{
+public:
+    /**
+     * Constructor.
+     * \param sim the simulation environment
+     * \param fsm the FSM of this state
+     */
+    scd_stm_base(scd_simulator& sim, scd_cont_man_master& fsm);
+
+    virtual ~scd_stm_base() {}
+
+    /* scd_cont_fsm_if */
+    void set_busy() {}
+    void set_idle(const sc_core::sc_time& time) {}
+    void set_done() {}
+    void set_fail();
+    void process();
+    bool active() const;
+    bool busy() const;
+    bool failed() const;
+    bool advance_time() const;
+    const sc_core::sc_time& get_time_step();
+
+protected:
+    scd_cont_man_master& _fsm;
+    std::list<scd_cont_slave_wrapper*>& _slaves;
+    sc_core::sc_time& _time_step;
+    scd_cont_state& _st_init;
+    scd_cont_state& _st_busy;
+    scd_cont_state& _st_idle;
+    scd_cont_state& _st_done;
+    scd_cont_state& _st_time_req;
+    scd_cont_state& _st_time;
+    scd_cont_state& _st_term_req;
+    scd_cont_state& _st_terminate;
+    scd_cont_state& _st_terminated;
+    scd_cont_state& _st_fail;
+    scd_cont_state& _st_failed;
+
+    /* member functions */
+    bool _check_slaves();
+    bool _some_slaves_active();
+    void _close_slaves();
+};
+
+#endif